Basic High Speed PCB Design

Steadiness in impedance requires association and coordination between the pcb designer and the pcb fabricator to optimize accomplishment. The signaling speed of ICs on PCBs is taking quicker. Several manufacturers have been shrinking to die parts, making the edge rates of signals faster. Other makers will take the chance to modification the die at the same time they make the parts RoHS compliant. Parts that have constantly acted in a design may not work appropriately at the new higher speeds.

Selecting the right parts, Rise Time,  Crosstalk, Impedance Control, Flow of Signals,  Reflections, Termination, and etc....

In addition to, boards will be obliged to be designed with more caution and more restrictions. This review will target on some basic ways to embody high-speed characteristics into board design, handing down the in-depth electrical knowledge about why they be supposed to be done that way for another time. There are many objectives of high-speed designing. Designers must know features that are required on the parts that are used. They will also have to follow transmission lines and how signals will flow on the board. It is necessary to know how to command impedance of those signals and the views that result from mismatches. As rise times crop, it becomes vigorously important to know how to attain and take care of good signal integrity, including crosstalk, reflections, termination, placement and routing. Furthermore, designers must know and understand power distribution and decoupling strategies that will enable the board to function correctly.

Selecting the right parts

The quickest signals produce the greatest likelihood for signal integrity problems. Therefore, it is important to choose the slowest parts that will do the job appropriately. There are fewer issues with slower parts, and they offer more authority than faster parts.
Some parts will route better than others in a group. Dissimilarities in the pin-out or overall shape of parts can cause less than desirable routing scenarios affecting the integrity. If the board designer predicts difficulty in routing a special footprint, it is probably a good idea to talk about this with the circuit designer and ask for a various part that will provide the same function and match into the entire routing scheme.
The power and ground pins of a part are important too. If a BGA has all the power and/or ground balls in the center of the part, there is a longer return loop for the signals away from that area. This can result in intensified crosstalk and EMI problems. Additionally, if the parts used to have their power and ground pins far apart, as with Dip packages, there is increased inductance and return loop problems. It is best to use parts that have these pins right next to each other.
Lead frame inductance should also be considered. Generally, the larger the part, the more lead frame inductance there is. The inductance can come from several sources, such as the length of wire from the die to the pin, the type of leads on the part or the size of the pads of a large capacitor as contrasted to a smaller one.

Rise Time

A remarkably necessary factor in high-speed designing is rise time. It is far more important than clock speed alone. By definition, rise time is the time needed for the signal to rise from 10% to 90% of its total amplitude as it turns on, or falls from 90% to 10% of its amplitude as it turns off. When the energy of a signal goes up in a very short period of time, there are further harmonics at a higher amplitude that must be negotiated with. Plus, the frequencies of the whole bandwidth from the clock through the highest harmonics of the signal must be thought over. All this leads to the enlarged likelihood of interference with everything about the signal.


Crosstalk is the transfer of energy from a functioning source to a victim, so it is essential for the designer to know all the origins of noise in the circuitry. As rise time shortens, the opportunity of crosstalk rises dramatically. Several other factors that increase crosstalk are close traces in x, y or z directions, wide traces, traces far from a return plane, traces crossing a split in a return plane and long traces without termination. Parts with a small signal swing are most susceptible to difficulties from crosstalk because they have smaller tolerance in their noise margin.  

It must be prevented as much as possible through careful design. Extra spatial arrangement should be used around clock signals, memory circuits, periodic repeatable signals and switching power supplies. Internal routing of most, if not all, net is helpful. Limiting traces routed in a parallel manner either on a single layer or layer to layer will limit the gradual increase of crosstalk between them. Good designs will always have planes close by every signal layer for return current, and will control rise time and signal strength with termination.

Impedance Control

The goal of impedance control is to take care of constant impedance, or at least control the impedance within tolerable limits. This is usually done by controlling trace width, controlling to trace proximity to planes in the stack, and controlling to trace proximity to other traces and planes on the same layer. There is much software of varying accuracy that is made to help configure those factors. It is normally best to use the same software the fabricator uses for consistency reasons. If the fabricator uses software that is not affordable, there are equations that can be used in a spreadsheet format by the designer. Any dissimilarities between the fabricators' calculations and the designers' calculations should be discussed. The fabricator's goal is a board that can be freely built, but there may be other issues that are important to the board designer who must be given equal notice. Consistency in impedance requires cooperation and coordination between the designer and the fabricator to optimize success.

Flow of Signals 

In a mandate to design high-speed boards signal flows must be agreed upon. Basically, when a current flow in a trace, there is an equal and opposite return current flowing in adjoining copper. The return current flows, whether we design a place for it to go or not, so it is best to design always that place by having a plane next to the signal layer. The basic definition of a transmission line is a signal and its return path, and the return current clarifies a consideration in the stack up of the layers of a high-speed board. Electromagnetic fields are continually present when energy flows from one place to another, causing the return current. Fields are a major interest in high-speed designs because they change very quickly, which enhances their ability to inhibit with everything else. Planes on adjacent layers reduce that effect.

Electromagnetic fields are always present when energy flows from one place to another, resulting in the return current. Because the current must go within a loop and return to its source. Fields are a major concern in high-speed designs because they change very quickly, which intensifies their ability to interfere with everything else. Planes on adjacent layers reduce that effect.


Preferably, a signal traveling down a trace from a source to a load would have all the energy passed on to the load. Unluckily, it doesn't normally work that way. If there is too much energy to transition smoothly, a reflection forms in the opposite direction that can cause distortion to the primary signal, false triggering to another ICs, and crosstalk and EMI difficulties to the region of the board.

It is caused by incompatible trace geometries, changes in routing like Y-splits, lengthy stubs and fast signals on traces that are too long  without termination. Reflection troubles can be decreased by careful placement of parts to set up excellent routing schemes, limiting stubs to 1/8 rise distance, limiting the length of high-speed traces to below termination length and using termination devices.


Termination devices suck up the excess energy at the load devices. There are two major types of termination, and they should not be integrated on a single signal.

Parallel termination
devices control extra energy at the last load, and should be laid at or just beyond that load. They provide a constant logic level on the line, but are a constant DC load or power drain. Some logic families need this kind of termination. Thevinin and RC terminations are types of parallel termination.

A series terminator is set near the source of the signal. It causes the signal on the trace to have the voltage needed. Because of the high impedance of the load, a reflection is still formed that causes the signal to double in strength, reaching the full voltage required and thus to turn on the loads on the line. This is called reflection mode switching. The termination method had to be used as often as possible inside the timing budget, as it operates less power and is best for EMI purposes.

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